# =================================================================
# Kaffe virtual machine for the i386
# =================================================================
#
# Copyright (c) 1996 Systems Architecture Research Centre,
#		   City University, London, UK.
#
# See the file "license.terms" for information on usage and redistribution
# of this file, and for a DISCLAIMER OF ALL WARRANTIES.
#
# Written by Tim Wilkinson <tim@sarc.city.ac.uk>, February 1996.

insn NOP(in=none; out=none) = 0
{
}

insn ACONST_NULL(in=none; out=objref) = 1
{
	movl 0,O1
}

insn ICONST_M1(in=none; out=int) = 2
{
	movl -1,O1
}

insn ICONST_0(in=none; out=int) = 3
{
	movl 0,O1
}

insn ICONST_1(in=none; out=int) = 4
{
	movl 1,O1
}

insn ICONST_2(in=none; out=int) = 5
{
	movl 2,O1
}

insn ICONST_3(in=none; out=int) = 6
{
	movl 3,O1
}

insn ICONST_4(in=none; out=int) = 7
{
	movl 4,O1
}

insn ICONST_5(in=none; out=int) = 8
{
	movl 5,O1
}

insn LCONST_0(in=none; out=long) = 9
{
	movl 0,O2 
	movl 0,O1
}

insn LCONST_1(in=none; out=long) = 10
{
	movl 0,O2
	movl 1,O1 
}

insn FCONST_0(in=none; out=float) = 11
{
	movl 0,O1
}

insn FCONST_1(in=none; out=float) = 12
{
	movl 0x3f800000,O1
}

insn FCONST_2(in=none; out=float) = 13
{
	movl 0x40000000,O1
}

insn DCONST_0(in=none; out=double) = 14
{
	movl 0,O2 
	movl 0,O1
}

insn DCONST_1(in=none; out=double) = 15
{
	movl 0,O2
	movl 0x3ff00000,O1
}

insn BIPUSH(in=none; out=int) = 16
{
	movl V1,O1
}

insn SIPUSH(in=none; out=int) = 17
{
	movl V1,O1
}

insn LDC1(in=none; out=any) = 18
{
	movl C1,O1
}

insn LDC2(in=none; out=any) = 19
{
	movl C1,O1
}

insn LDC2W(in=none; out=any,any) = 20
{
	movl C2,O2
	movl C1,O1 
}

insn ILOAD(in=none; out=int) = 21
{
	movl L1,O1
}

insn LLOAD(in=none; out=long) = 22
{
	movl L1,O2
	movl L2,O1 
}

insn FLOAD(in=none; out=float) = 23
{
	movl L1,O1
}

insn DLOAD(in=none; out=double) = 24
{
	movl L1,O2
	movl L2,O1 
}

insn ALOAD(in=none; out=objref) = 25
{
	movl L1,O1
}

insn ILOAD_0(in=none; out=int) = 26
{
	movl L1,O1
}

insn ILOAD_1(in=none; out=int) = 27
{
	movl L1,O1
}

insn ILOAD_2(in=none; out=int) = 28
{
	movl L1,O1
}

insn ILOAD_3(in=none; out=int) = 29
{
	movl L1,O1
}

insn LLOAD_0(in=none; out=long) = 30
{
	movl L1,O2 
	movl L2,O1
}

insn LLOAD_1(in=none; out=long) = 31
{
	movl L1,O2 
	movl L2,O1
}

insn LLOAD_2(in=none; out=long) = 32
{
	movl L1,O2 
	movl L2,O1
}

insn LLOAD_3(in=none; out=long) = 33
{
	movl L1,O2 
	movl L2,O1
}

insn FLOAD_0(in=none; out=float) = 34
{
	movl L1,O1
}

insn FLOAD_1(in=none; out=float) = 35
{
	movl L1,O1
}

insn FLOAD_2(in=none; out=float) = 36
{
	movl L1,O1
}

insn FLOAD_3(in=none; out=float) = 37
{
	movl L1,O1
}

insn DLOAD_0(in=none; out=double) = 38
{
	movl L2,O1 
	movl L1,O2
}

insn DLOAD_1(in=none; out=double) = 39
{
	movl L2,O1 
	movl L1,O2
}

insn DLOAD_2(in=none; out=double) = 40
{
	movl L2,O1 
	movl L1,O2
}

insn DLOAD_3(in=none; out=double) = 41
{
	movl L2,O1 
	movl L1,O2
}

insn ALOAD_0(in=none; out=objref) = 42
{
	movl L1,O1
}

insn ALOAD_1(in=none; out=objref) = 43
{
	movl L1,O1
}

insn ALOAD_2(in=none; out=objref) = 44
{
	movl L1,O1
}

insn ALOAD_3(in=none; out=objref) = 45
{
	movl L1,O1
}

insn IALOAD(in=int,objref; out=int) = 46
{
	movl V1(I2,I1,4),O1
}

insn LALOAD(in=int,objref; out=long) = 47
{
	leal V1(I2,I1,4),O2 
	movl (O2),O1 
	movl 4(O2),O2
}

insn FALOAD(in=int,objref; out=float) = 48
{
	movl V1(I2,I1,4),O1
}

insn DALOAD(in=int,objref; out=double) = 49
{
	leal V1(I2,I1,4),O2 
	movl (O2),O1 
	movl 4(O2),O2
}

insn AALOAD(in=int,objref; out=objref) = 50
{
	movl V1(I2,I1,4),O1
}

insn BALOAD(in=int,objref; out=int) = 51
{
	movsbl V1(I2,I1,1),O1
}

insn CALOAD(in=int,objref; out=int) = 52
{
	movzbl V1(I2,I1,1),O1
}

insn SALOAD(in=int,objref; out=int) = 53
{
	movswl V1(I2,I1,2),O1
}

insn ISTORE(in=int; out=none) = 54
{
	movl I1,L1
}

insn LSTORE(in=long; out=none) = 55
{
	movl I1,L2 
	movl I2,L1
}

insn FSTORE(in=float; out=none) = 56
{
	movl I1,L1
}

insn DSTORE(in=double; out=none) = 57
{
	movl I1,L2 
	movl I2,L1
}

insn ASTORE(in=objref; out=none) = 58
{
	movl I1,L1
}

insn ISTORE_0(in=int; out=none) = 59
{
	movl I1,L1
}

insn ISTORE_1(in=int; out=none) = 60
{
	movl I1,L1
}

insn ISTORE_2(in=int; out=none) = 61
{
	movl I1,L1
}

insn ISTORE_3(in=int; out=none) = 62
{
	movl I1,L1
}

insn LSTORE_0(in=long; out=none) = 63
{
	movl I1,L2 
	movl I2,L1
}

insn LSTORE_1(in=long; out=none) = 64
{
	movl I1,L2 
	movl I2,L1
}

insn LSTORE_2(in=long; out=none) = 65
{
	movl I1,L2 
	movl I2,L1
}

insn LSTORE_3(in=long; out=none) = 66
{
	movl I1,L2 
	movl I2,L1
}

insn FSTORE_0(in=float; out=none) = 67
{
	movl I1,L1
}

insn FSTORE_1(in=float; out=none) = 68
{
	movl I1,L1
}

insn FSTORE_2(in=float; out=none) = 69
{
	movl I1,L1
}

insn FSTORE_3(in=float; out=none) = 70
{
	movl I1,L1
}

insn DSTORE_0(in=double; out=none) = 71
{
	movl I1,L2 
	movl I2,L1
}

insn DSTORE_1(in=double; out=none) = 72
{
	movl I1,L2 
	movl I2,L1
}

insn DSTORE_2(in=double; out=none) = 73
{
	movl I1,L2 
	movl I2,L1
}

insn DSTORE_3(in=double; out=none) = 74
{
	movl I1,L2 
	movl I2,L1
}

insn ASTORE_0(in=objref; out=none) = 75
{
	movl I1,L1
}

insn ASTORE_1(in=objref; out=none) = 76
{
	movl I1,L1
}

insn ASTORE_2(in=objref; out=none) = 77
{
	movl I1,L1
}

insn ASTORE_3(in=objref; out=none) = 78
{
	movl I1,L1
}

insn IASTORE(in=int,int,objref; out=none) = 79
{
	movl I1,V1(I3,I2,4)
}

insn LASTORE(in=long,int,objref; out=none) = 80
{
	movl I1,V1(I4,I3,8) 
	movl I2,V2(I4,I3,8)
}

insn FASTORE(in=float,int,objref; out=none) = 81
{
	movl I1,V1(I3,I2,4)
}

insn DASTORE(in=double,int,objref; out=none) = 82
{
	movl I1,V1(I4,I3,8) 
	movl I2,V2(I4,I3,8)
}

insn AASTORE(in=objref,int,objref; out=none) = 83
{
	movl I1,V1(I3,I2,4)
}

insn BASTORE(in=int,int,objref; out=none) = 84
{
	movb B1,V1(I3,I2,1)
}

insn CASTORE(in=int,int,objref; out=none) = 85
{
	movb B1,V1(I3,I2,1)
}

insn SASTORE(in=int,int,objref; out=none) = 86
{
	movw B1,V1(I3,I2,2)
}

insn POP(in=any; out=none) = 87
{
}

insn POP2(in=any,any; out=none) = 88
{
}

insn DUP(in=any; out=any,any) = 89
{
	movl I1,O1
}

insn DUP_X1(in=any,any; out=any,any,any) = 90
{
	xchgl I1,I2 
	movl I2,O1
}

insn DUP_X2(in=any,any,any; out=any,any,any,any) = 91
{
	xchgl I1,I2 
	xchgl I2,I3 
	movl I3,O1
}

insn DUP2(in=any,any; out=any,any,any,any) = 92
{
	movl I1,O1 
	movl I2,O2
}

#
# Really this instruction has 5 outputs rather than 4 but we don't
#  have enough register on the i386 to do it like that.
#
insn DUP2_X1(in=any,any,any; out=any,any,any,any) = 93
{
	pushl I2 
	movl I1,O1 
	xchgl I3,I1 
	xchgl I1,I2
}

#
# Really this instruction has 6 outputs rather than 4 but we don't
#  have enough register on the i386 to do it like that.
#
insn DUP2_X2(in=any,any,any,any; out=any,any,any,any) = 94
{
	pushl I2 
	pushl I1
}

insn SWAP(in=any,any; out=any,any) = 95
{
	xchgl I1,O1
}

insn IADD(in=int,int; out=int) = 96
{
	addl I1,O1
}

insn LADD(in=long,long; out=long) = 97
{
	addl I1,O1 
	adcl I2,O2
}

insn FADD(in=float,float; out=float; sync) = 98
{
	flds S1 
	fadds S2 
	fstps S2 
	addl 4,%esp
}

insn DADD(in=double,double; out=double; sync) = 99
{
	fldl S1 
	faddl S3 
	fstpl S3 
	addl 8,%esp
}

insn ISUB(in=int,int; out=int) = 100
{
	subl I1,O1
}

insn LSUB(in=long,long; out=long) = 101
{
	subl I1,O1 
	sbbl I2,O2
}

insn FSUB(in=float,float; out=float; sync) = 102
{
	flds S1 
	fsubs S2 
	fstps S2 
	addl 4,%esp
}

insn DSUB(in=double,double; out=double; sync) = 103
{
	fldl S1 
	fsubl S3 
	fstpl S3 
	addl 8,%esp
}

insn IMUL(in=int,int; out=int) = 104
{
	imull I1,O1
}

insn LMUL(in=long,long; out=long; soft) = 105
{
	call _soft_lmul 
	addl 8,%esp
}

insn FMUL(in=float,float; out=float; sync) = 106
{
	flds S1 
	fmuls S2 
	fstps S2 
	addl 4,%esp
}

insn DMUL(in=double,double; out=double; sync) = 107
{
	fldl S1 
	fmull S3 
	fstpl S3 
	addl 8,%esp
}

insn IDIV(in=int,int; out=int; sync) = 108
{
	popl %ebx 
	popl %eax 
	movl %eax,%edx 
	sarl 31,%edx 
	idivl %eax,%ebx 
	pushl %eax
}

insn LDIV(in=long,long; out=long; soft) = 109
{
	call _soft_ldiv 
	addl 8,%esp
}

insn FDIV(in=float,float; out=float; sync) = 110
{
	flds S1 
	fdivs S2 
	fstps S2 
	addl 4,%esp
}

insn DDIV(in=double,double; out=double; sync) = 111
{
	fldl S1 
	fdivl S3 
	fstpl S3 
	addl 8,%esp
}

insn IREM(in=int,int; out=int; sync) = 112
{
	popl %ebx 
	popl %eax 
	movl %eax,%edx 
	sarl 31,%edx 
	idivl %eax,%ebx 
	pushl %edx
}

insn LREM(in=long,long; out=long; soft) = 113
{
	call _soft_lrem 
	addl 8,%esp
}

insn FREM(in=float,float; out=float; soft) = 114
{
	call _soft_frem 
	addl 4,%esp
}

insn DREM(in=double,double; out=double; soft) = 115
{
	call _soft_drem 
	addl 8,%esp
}

insn INEG(in=int; out=int) = 116
{
	negl O1
}

insn LNEG(in=long; out=long) = 117
{
	negl O1 
	adcl 0,O2 
	negl O2
}

insn FNEG(in=float; out=float; sync) = 118
{
	fldz 
	fsubs S1 
	fstps S1
}

insn DNEG(in=double; out=double; sync) = 119
{
	fldz 
	fsubl S1 
	fstpl S1
}

insn ISHL(in=int,int; out=int; sync) = 120
{
	popl %ecx 
	sall %ecx,S1
}

insn LSHL(in=long,int; out=long; soft) = 121
{
	call _soft_lshl 
	addl 4,%esp
}

insn ISHR(in=int,int; out=int; sync) = 122
{
	popl %ecx 
	sarl %ecx,S1
}

insn LSHR(in=long,int; out=long; soft) = 123
{
	call _soft_lshr 
	addl 4,%esp
}

insn IUSHR(in=int,int; out=int; sync) = 124
{
	popl %ecx 
	shrl %ecx,S1
}

insn LUSHR(in=long,int; out=long; soft) = 125
{
	call _soft_lushr 
	addl 4,%esp
}

insn IAND(in=int,int; out=int) = 126
{
	andl I1,O1
}

insn LAND(in=long,long; out=long) = 127
{
	andl I1,O1 
	andl I2,O2
}

insn IOR(in=int,int; out=int) = 128
{
	orl I1,O1
}

insn LOR(in=long,long; out=long) = 129
{
	orl I1,O1 
	orl I2,O2
}

insn IXOR(in=int,int; out=int) = 130
{
	xorl I1,O1
}

insn LXOR(in=long,long; out=long) = 131
{
	xorl I1,O1 
	xorl I2,O2
}

insn IINC(in=none; out=none) = 132
{
	addl V2,L1
}

insn I2L(in=int; out=long) = 133
{
	movl I1,O1 
	sarl 31,O2
}

insn I2F(in=int; out=float; sync) = 134
{
	filds S1 
	fstps S1
}

insn I2D(in=int; out=double; sync) = 135
{
	filds S1 
	subl 4,%esp 
	fstpl S1
}

insn L2I(in=long; out=int) = 136
{
	movl I1,O1
}

insn L2F(in=long; out=float; sync) = 137
{
	fildd S1 
	addl 4,%esp 
	fstps S1
}

insn L2D(in=long; out=double; sync) = 138
{
	fildd S1 
	fstpl S1
}

insn F2I(in=float; out=int; sync) = 139
{
	flds S1 
	fistps S1
}

insn F2L(in=float; out=long; sync) = 140
{
	flds S1 
	subl 4,%esp 
	fistpl S1
}

insn F2D(in=float; out=double; sync) = 141
{
	flds S1 
	subl 4,%esp 
	fstpl S1
}

insn D2I(in=double; out=int; sync) = 142
{
	fldl S1 
	addl 4,%esp 
	fistps S1
}

insn D2L(in=double; out=long; sync) = 143
{
	fldl S1 
	fistpl S1
}

insn D2F(in=double; out=float; sync) = 144
{
	fldl S1 
	addl 4,%esp 
	fstps S1
}

insn INT2BYTE(in=int; out=int) = 145
{
	movsbl B1,O1
}

insn INT2CHAR(in=int; out=int) = 146
{
	andl 255,O1
}

insn INT2SHORT(in=int; out=int) = 147
{
	movswl W1,O1
}

insn LCMP(in=long,long; out=int; soft) = 148
{
	call _soft_lcmp 
	addl 12,%esp
}

insn FCMPL(in=float,float; out=int; soft) = 149
{
	call _soft_fcmpl 
	addl 4,%esp
}

insn FCMPG(in=float,float; out=int; soft) = 150
{
	call _soft_fcmpg 
	addl 4,%esp
}

insn DCMPL(in=double,double; out=int; soft) = 151
{
	call _soft_dcmpl 
	addl 12,%esp
}

insn DCMPG(in=double,double; out=int; soft) = 152
{
	call _soft_dcmpg 
	addl 12,%esp
}

insn IFEQ(in=int; out=none) = 153
{
	cmpl 0,I1 
	je J
}

insn IFNE(in=int; out=none) = 154
{
	cmpl 0,I1 
	jne J
}

insn IFLT(in=int; out=none) = 155
{
	cmpl 0,I1 
	jlt J
}

insn IFGE(in=int; out=none) = 156
{
	cmpl 0,I1 
	jge J
}

insn IFGT(in=int; out=none) = 157
{
	cmpl 0,I1 
	jgt J
}

insn IFLE(in=int; out=none) = 158
{
	cmpl 0,I1 
	jle J
}

insn IF_ICMPEQ(in=int,int; out=none) = 159
{
	cmpl I1,I2 
	je J
}

insn IF_ICMPNE(in=int,int; out=none) = 160
{
	cmpl I1,I2 
	jne J
}

insn IF_ICMPLT(in=int,int; out=none) = 161
{
	cmpl I1,I2 
	jlt J
}

insn IF_ICMPGE(in=int,int; out=none) = 162
{
	cmpl I1,I2 
	jge J
}

insn IF_ICMPGT(in=int,int; out=none) = 163
{
	cmpl I1,I2 
	jgt J
}

insn IF_ICMPLE(in=int,int; out=none) = 164
{
	cmpl I1,I2 
	jle J
}

insn IF_ACMPEQ(in=objref,objref; out=none) = 165
{
	cmpl I1,I2 
	je J
}

insn IF_ACMPNE(in=objref,objref; out=none) = 166
{
	cmpl I1,I2 
	jne J
}

insn GOTO(in=none; out=none) = 167
{
	jmpl J
}

insn JSR(in=none; out=int; sync) = 168
{
	call J
}

insn RET(in=none; out=none; sync) = 169
{
	pushl L1 
	ret
}

insn TABLESWITCH(in=int; out=none; sync) = 170
{
	popl %eax
	movl V1,%ebx
	subl V2,%eax
	cmpl V3,%eax
	skipb1
	movl V3,%eax
	movl 0(%ebx,%eax,4),%eax
	jmpl *%eax
}

insn LOOKUPSWITCH(in=int; out=none; sync) = 171
{
	popl %eax
	movl V1,%edx
	movl V2,%ebx
	movl (%ebx),%ecx
	cmpl %eax,%ecx
	skipeq3
	subl 8,%ebx
	cmpl %ebx,%edx
	skipneback5
	movl 4(%ebx),%eax
	jmpl *%eax
}

insn IRETURN(in=int; out=none; sync) = 172
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
		addl 4,%esp
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	popl %eax
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn LRETURN(in=long; out=none; sync) = 173
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
		addl 4,%esp
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	popl %eax
	popl %edx
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn FRETURN(in=float; out=none; sync) = 174
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
		addl 4,%esp
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	popl %eax
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn DRETURN(in=double; out=none; sync) = 175
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
		addl 4,%esp
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	popl %eax
	popl %ebx
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn ARETURN(in=objref; out=none; sync) = 176
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
		addl 4,%esp
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	popl %eax
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn RETURN(in=none; out=none; sync) = 177
{
+	if (i->value[0] != 0) {
		movl L1,%eax
		pushl %eax
		call _soft_monitorexit
+	}
+	else if (i->value[1] != 0) {
		pushl V2
		call _soft_monitorexit
		addl 4,%esp
+	}
	movl %ebp,%esp 
	popl %ebp 
	ret
}

insn GETSTATIC(in=none; out=none; sync) = 178
{
+	abort(); /* Unused - see quick versions */
}

insn PUTSTATIC(in=none; out=none; sync) = 179
{
+	abort(); /* Unused - see quick versions */
}

insn GETFIELD(in=none; out=none; sync) = 180
{
+	abort(); /* Unused - see quick versions */
}

insn PUTFIELD(in=none; out=none; sync) = 181
{
+	abort(); /* Unused - see quick versions */
}

#
# Virtual method invocation uses a cache of methods.  When an invoke is
# done we check the tag (the method name) and if it matches invoke the
# cached method.  If no match, we call the soft function to perform the
# mapping.  We assume %esi will be saved by the soft function.
# This is slower than direct virtual function calls but means we do not
# have to generate all possible methods before hand, allowing them to
# be generated on cache misses.
#
insn INVOKEVIRTUAL(in=none; out=none; sync) = 182
{
	movl V1(%esp),%ebx
	movl (%ebx),%esi
	cmpl V4,V2(%esi)
+	/* skipeq5 is a magic instruction specifically written to skip
+	   the next five instructions in these particular circumstances. */
	skipeq5
	pushl V4
	pushl %esi
	call _soft_lookupmethod
	popl %esi
	addl 4,%esp
	movl V3(%esi),%ebx
	call *%ebx
	addl V5,%esp
+	if (i->value[7] == 1) {
		pushl %eax
+	}
+	else if (i->value[7] == 2) {
		pushl %edx
		pushl %eax
+	}
}

insn INVOKENONVIRTUAL(in=none; out=none; sync) = 183
{
	movl V1,%esi
	cmpl V4,V2(%esi)
	skipeq5
	pushl V4
	pushl %esi
	call _soft_lookupmethod
	popl %esi
	addl 4,%esp
	movl V3(%esi),%ebx
	call *%ebx
	addl V5,%esp
+	if (i->value[7] == 1) {
		pushl %eax
+	}
+	else if (i->value[7] == 2) {
		pushl %edx
		pushl %eax
+	}
}

insn INVOKESTATIC(in=none; out=none; sync) = 184
{
	movl V1,%esi
	cmpl V4,V2(%esi)
	skipeq5
	pushl V4
	pushl %esi
	call _soft_lookupmethod
	popl %esi
	addl 4,%esp
	movl V3(%esi),%ebx
	call *%ebx
	addl V5,%esp
+	if (i->value[7] == 1) {
		pushl %eax
+	}
+	else if (i->value[7] == 2) {
		pushl %edx
		pushl %eax
+	}
}

insn INVOKEINTERFACE(in=none; out=none; sync) = 185
{
	movl V1(%esp),%ebx
	movl (%ebx),%esi
	cmpl V4,V2(%esi)
	skipeq5
	pushl V4
	pushl %esi
	call _soft_lookupmethod
	popl %esi
	addl 4,%esp
	movl V3(%esi),%ebx
	call *%ebx
	addl V5,%esp
+	if (i->value[7] == 1) {
		pushl %eax
+	}
+	else if (i->value[7] == 2) {
		pushl %edx
		pushl %eax
+	}
}

insn NEW(in=none; out=objref; soft) = 187
{
	pushl V1 
	call _soft_new
}

insn NEWARRAY(in=int; out=objref; soft) = 188
{
	pushl V1
	call _soft_newarray
	addl 4,%esp
}

insn ANEWARRAY(in=int; out=objref; soft) = 189
{
	pushl V1
	call _soft_anewarray
	addl 4,%esp
}

insn ARRAYLENGTH(in=objref; out=int) = 190
{
	movl V1(I1),O1
}

insn ATHROW(in=objref; out=none; soft) = 191
{
	call _soft_athrow
}

insn CHECKCAST(in=objref; out=objref; soft) = 192
{
	pushl V1 
	call _soft_checkcast 
	addl 4,%esp
}

insn INSTANCEOF(in=objref; out=int; soft) = 193
{
	pushl V1 
	call _soft_instanceof 
	addl 4,%esp
}

insn MONITORENTER(in=objref; out=none; soft) = 194
{
	call _soft_monitorenter
	addl 4,%esp
}

insn MONITOREXIT(in=objref; out=none; soft) = 195
{
	call _soft_monitorexit
	addl 4,%esp
}

insn WIDE(in=none; out=none) = 196
{
}

insn MULTIANEWARRAY(in=none; out=objref; soft) = 197
{
	pushl V1 
	pushl V2 
	call _soft_multianewarray
	addl V3,%esp
}

insn IFNULL(in=objref; out=none) = 198
{
	cmpl 0,I1 
	je J
}

insn IFNONNULL(in=objref; out=none) = 199
{
	cmpl 0,I1 
	jne J
}

insn GOTO_W(in=none; out=none) = 200
{
	jmpl J
}

insn JSR_W(in=none; out=none; sync) = 201
{
	call J
}

insn BREAKPOINT(in=none; out=none) = 202
{
	brkpt
}

insn RET_W(in=none; out=none; soft) = 210
{
	call _soft_unimplemented
}

insn GETSTATIC_QUICK(in=none; out=any) = 248
{
	movl (V1),O1
}

insn GETSTATIC2_QUICK(in=none; out=any,any) = 249
{
	movl (V1),O1 
	movl (V2),O2
}

insn PUTSTATIC_QUICK(in=any; out=none) = 250
{
	movl I1,(V1)
}

insn PUTSTATIC2_QUICK(in=any,any; out=none) = 251
{
	movl I1,(V1)
	movl I2,(V2)
}

insn GETFIELD_QUICK(in=objref; out=any) = 252
{
	movl V1(I1),O1
}

insn GETFIELD2_QUICK(in=objref; out=any,any) = 253
{
	movl V1(I1),O1 
	movl V2(I1),O2
}

insn PUTFIELD_QUICK(in=objref,any; out=none) = 254
{
	movl I1,V1(I2)
}

insn PUTFIELD2_QUICK(in=objref,any,any; out=none) = 255
{
	movl I1,V1(I3)
	movl I2,V2(I3)
}

#
# Register definitions.
#
reg %eax int = 0;
reg %ecx int = 1;
reg %edx int = 2;
reg %ebx int = 3;
